Nächste Seite: Re: Aufgaben und Übungen, Aufwärts: Graphen, Schaltwerke und Zahlen Vorherige Seite: Re: Aufgaben und Übungen,
b a x b a y0 y1 y2
0 0 0 0 0 1 0 0 0
1 0 0 1 1 0 1 0 0
2 0 1 0 0 1 0 0 0
3 0 1 1 0 0 1 0 0
4 1 0 0 1 1 0 1 0
5 1 0 1 1 0 0 0 0
6 1 1 0 0 0 1 0 0
7 1 1 1 1 1 1 0 1
b a x b
0 0 0 0 0
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 1
6 1 1 0 0
7 1 1 1 1
b a x a
0 0 0 0 1
1 0 0 1 0
2 0 1 0 1
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 0
7 1 1 1 1
b a x y0
0 0 0 0 0
1 0 0 1 1
2 0 1 0 0
3 0 1 1 1
4 1 0 0 0
5 1 0 1 0
6 1 1 0 1
7 1 1 1 1
b a x y1
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 0
7 1 1 1 0
b a x y2
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 0
4 1 0 0 0
5 1 0 1 0
6 1 1 0 0
7 1 1 1 1
b a x b
1 0 0 1 1
4 1 0 0 1
5 1 0 1 1
7 1 1 1 1
b a x a
0 0 0 0 1
2 0 1 0 1
4 1 0 0 1
7 1 1 1 1
b a x y0
1 0 0 1 1
3 0 1 1 1
6 1 1 0 1
7 1 1 1 1
b a x y1
4 1 0 0 1
b a x y2
7 1 1 1 1
b a x b
1 0 0 1 1
4 1 0 0 1
5 1 0 1 1
7 1 1 1 1
b a x a
0 0 0 0 1
2 0 1 0 1
4 1 0 0 1
7 1 1 1 1
b a x y0
1 0 0 1 1
3 0 1 1 1
6 1 1 0 1
7 1 1 1 1
b a x y1
4 1 0 0 1
b a x y2
7 1 1 1 1
b a x b
Gruppe 1:
1 0 0 1 1
4 1 0 0 1
Gruppe 2:
5 1 0 1 1
Gruppe 3:
7 1 1 1 1
1:5 - 0 1
1:4 1 0 -
5:7 1 - 1
1 4 5 7
1:5 * *
1:4 * *
5:7 * *
1 4 5 7
1:4 * *
5:7 * *
DNF:
b <= (b and not a) or
(b and x);
KNF:
b <= not ((not b or a) and
(not b or not x))
b a x a
Gruppe 0:
0 0 0 0 1
Gruppe 1:
2 0 1 0 1
4 1 0 0 1
Gruppe 3:
7 1 1 1 1
0:2 0 - 1
0:4 - 0 0
7 1 1 1
0 2 4 7
0:2 * *
0:4 * *
7 *
DNF:
a <= (not b and x) or
(not a and not x) or
(b and a and x);
KNF:
a <= not((b or not x) and
(a or x) and
(not b or not a or not x));
b a x y0
Gruppe 1:
1 0 0 1 1
Gruppe 2:
3 0 1 1 1
6 1 1 0 1
Gruppe 3:
7 1 1 1 1
1:3 0 - 1
3:7 - 1 1
6:7 1 1 -
1 3 6 7
1:3 * *
3:7 * *
6:7 * *
1 3 6 7
1:3 * *
6:7 * *
DNF:
y0 <= (not b and x) or
(b and a)
KNF:
y0 <= not ((b or not x) and
(not b or not a))
b a x y1
4 1 0 0 1
DNF:
y1 <= (b and not a and not x)
KNF:
y2 <= (not (not b or a or x))
b a x y2
7 1 1 1 1
DNF:
y2 <= (b and a or x)
KNF:
y2 <= not(not b or not a or not x)
DNF:
b <= (b and not a) or
(b and x);
KNF:
b <= not ((not b or a) and
(not b or not x))
DNF:
a <= (not b and x) or
(not a and not x) or
(b and a and x);
KNF:
a <= not((b or not x) and
(a or x) and
(not b or not a or not x));
DNF:
y0 <= (not b and x) or
(b and a)
KNF:
y0 <= not ((b or not x) and
(not b or not a))
DNF:
y1 <= (b and not a and not x)
KNF:
y2 <= (not (not b
\section{ Re: Aufgaben und "Ubungen, Jetzt machen wir das in VHDL - das heisst, erst das "Ubergangsschaltnetz und das Ausgangsschaltnetz und wenn das da ist - dann kommt - das RS-Latch, das taktgesteuerte RS-Latch, das D-Latch, das D-Master-Slave-Slave-FF, das Register, dann sind wir fast so weit\\
Die Testbench hat keine echten werte - es hat nur ein CLK und ein x noch als Eingabe und mit dem CLK muss das Schaltwerk die Ausgabe machen.
\section{ Re: Aufgaben und "Ubungen, }
\begin{verbatim}
b a x b a y0 y1 y2
0 0 0 0 0 1 0 0 0
1 0 0 1 1 0 1 0 0
2 0 1 0 0 1 0 0 0
3 0 1 1 0 0 1 0 0
4 1 0 0 1 1 0 1 0
5 1 0 1 1 0 0 0 0
6 1 1 0 0 0 1 0 0
7 1 1 1 1 1 1 0 1
b a x b
0 0 0 0 0
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 1
6 1 1 0 0
7 1 1 1 1
b a x a
0 0 0 0 1
1 0 0 1 0
2 0 1 0 1
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 0
7 1 1 1 1
b a x y0
0 0 0 0 0
1 0 0 1 1
2 0 1 0 0
3 0 1 1 1
4 1 0 0 0
5 1 0 1 0
6 1 1 0 1
7 1 1 1 1
b a x y1
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 0
7 1 1 1 0
b a x y2
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 0
4 1 0 0 0
5 1 0 1 0
6 1 1 0 0
7 1 1 1 1
b a x b
1 0 0 1 1
4 1 0 0 1
5 1 0 1 1
7 1 1 1 1
b a x a
0 0 0 0 1
2 0 1 0 1
4 1 0 0 1
7 1 1 1 1
b a x y0
1 0 0 1 1
3 0 1 1 1
6 1 1 0 1
7 1 1 1 1
b a x y1
4 1 0 0 1
b a x y2
7 1 1 1 1
b a x b
1 0 0 1 1
4 1 0 0 1
5 1 0 1 1
7 1 1 1 1
b a x a
0 0 0 0 1
2 0 1 0 1
4 1 0 0 1
7 1 1 1 1
b a x y0
1 0 0 1 1
3 0 1 1 1
6 1 1 0 1
7 1 1 1 1
b a x y1
4 1 0 0 1
b a x y2
7 1 1 1 1
b a x b
Gruppe 1:
1 0 0 1 1
4 1 0 0 1
Gruppe 2:
5 1 0 1 1
Gruppe 3:
7 1 1 1 1
1:5 - 0 1
1:4 1 0 -
5:7 1 - 1
1 4 5 7
1:5 * *
1:4 * *
5:7 * *
1 4 5 7
1:4 * *
5:7 * *
DNF:
b <= (b and not a) or
(b and x);
KNF:
b <= not ((not b or a) and
(not b or not x))
b a x a
Gruppe 0:
0 0 0 0 1
Gruppe 1:
2 0 1 0 1
4 1 0 0 1
Gruppe 3:
7 1 1 1 1
0:2 0 - 1
0:4 - 0 0
7 1 1 1
0 2 4 7
0:2 * *
0:4 * *
7 *
DNF:
a <= (not b and x) or
(not a and not x) or
(b and a and x);
KNF:
a <= not((b or not x) and
(a or x) and
(not b or not a or not x));
b a x y0
Gruppe 1:
1 0 0 1 1
Gruppe 2:
3 0 1 1 1
6 1 1 0 1
Gruppe 3:
7 1 1 1 1
1:3 0 - 1
3:7 - 1 1
6:7 1 1 -
1 3 6 7
1:3 * *
3:7 * *
6:7 * *
1 3 6 7
1:3 * *
6:7 * *
DNF:
b <= (b and not a) or
(b and x);
KNF:
b <= not ((not b or a) and
(not b or not x));
DNF:
a <= (not b and x) or
(not a and not x) or
(b and a and x);
KNF:
a <= not((b or not x) and
(a or x) and
(not b or not a or not x));
DNF:
y0 <= (not b and x) or
(b and a);
KNF:
y0 <= not ((b or not x) and
(not b or not a));
b a x y1
4 1 0 0 1
DNF:
y1 <= (b and not a and not x);
KNF:
y2 <= (not (not b or a or x));
b a x y2
7 1 1 1 1
DNF:
y2 <= (b and a or x);
KNF:
y2 <= not(not b or not a or not x);
DNF:
b <= (b and not a) or
(b and x);
KNF:
b <= not ((not b or a) and
(not b or not x));
DNF:
a <= (not b and x) or
(not a and not x) or
(b and a and x);
KNF:
a <= not((b or not x) and
(a or x) and
(not b or not a or not x));
DNF:
y0 <= (not b and x) or
(b and a);
KNF:
y0 <= not ((b or not x) and
(not b or not a));
DNF:
y1 <= (b and not a and not x);
KNF:
y2 <= (not (not b or a or x));
-- den VHDL Code nur mit DNF
entity meinautomat0028ausgangschaltnetz is
port
(
a, b, x: in bit;
y0, y1, y2: out bit
);
end;
entity meinautomat0028uebergangsschaltnetz is
port
(
a, b: inout bit;
x: in bit
);
end;